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We will develop a method to automatically apply a suitable sequence of enabling transformations to the application.

Energy-efficient instruction set synthesis for application-specific processors

Efficiency and flexibility are two major requirements driving embedded system design. Negotiating this tradeoff is critical in a wide variety of applications, ranging from high-performance systems to battery-driven systems.


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Application-specific instruction set processors ASIPs offer a good tradeoff between efficiency and flexibility by realizing only the critical operations in the application s of interest using custom hardware. Conventional approaches to ASIP design are based on designing and implementing a new instruction set and processor architecture from scratch for each application.

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Unfortunately, the design turnaround time for such approaches may be large and is comparable to design cycles for custom hardware implementations. The recent evolution of customizable and extensible processor technology, such as Tensilica's Xtensa and ARC's ARCTangent processor cores, has provided embedded system designers with a mechanism to design ASIPs with rapid turnaround times through the use of re-targetable software development tool flows, and configurable soft intellectual property IP.


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However, the task of customizing the processor and extending it with custom hardware instruction units, co-processors, peripherals are still largely manual and left to the designer's expertise. In order to realize the potential for energy efficiency as well as flexibility that ASIPs offer, it is necessary to develop high-level methodologies that automatically identify application hot-spots and map them to custom hardware that extends the underlying configurable platform. No algorithms or tools exist for extensible processor platforms that address any of the above problems.

Improving Verification Efficiency Using Application Specific Instruction Processors

We have taken the first step in this direction by developing algorithms and a tool to automatically identify custom instructions for extensible processors. This tool results in an average performance improvement of 3. Please report errors in award information by writing to: Presidential and Honorary Awards. What I liked most about this book is the fact that the author does not tell you a lot of high level stuff.

Instead, he uses many examples and figures to illustrate possible design alternatives. In summary, this book has given me a lot of new ideas on what I can do better in future ASIP projects! Feedback If you have a question or problem, visit our Help pages.

Fast ASIP Design Prototyping tool

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Improving Verification Efficiency Using Application Specific Instruction Processors

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